How to reduce noise from fast digital clocks

A 25 MHz clock rarely creates only a 25 MHz EMC problem. Fast edge rates can produce measurable harmonics hundreds of megahertz above the fundamental, with the PCB, cables and enclosure deciding which ones escape.

Why clock frequency is only part of the problem

Digital clock EMC is governed more by transition time, current-loop geometry and coupling paths than by the nominal clock frequency alone. A clock with sub-nanosecond edges contains substantially more high-frequency energy than a slower-edged signal operating at the same repetition rate. Those spectral components excite PCB structures, apertures, cables and poorly controlled return paths.

The practical distinction is between clock rate and bandwidth. Clock rate determines the spacing between harmonics. Rise and fall times influence how far those harmonics remain significant. A useful engineering approximation is that meaningful signal bandwidth extends to a frequency related to the inverse of edge time, although the exact spectrum depends on waveform shape, loading, package behaviour and the measurement threshold.

Replacing a 100 MHz clock with a 50 MHz source does not necessarily halve the emissions problem. If the replacement has much faster transitions, its upper harmonics may be stronger. This is why selecting logic families solely by propagation delay can create avoidable EMC difficulty.

Find the actual radiation mechanism

A spectrum analyser peak does not identify the coupling path. The peak may originate at the clock source, but radiation can occur from a display cable, power lead, heatsink, enclosure seam or connector shield. Treating the oscillator as both source and antenna leads to ineffective fixes.

Start by comparing suspected emissions with the fundamental clock and its harmonics. Harmonic alignment is evidence, not proof. DC/DC converters, memory interfaces and periodic firmware activity can produce overlapping spectral lines. Change the clock frequency slightly, where the design permits, and observe whether the emission moves proportionally. Switching operating modes can provide another useful correlation.

Near-field probing helps separate source localisation from far-field behaviour. A magnetic-field probe is useful around high di/dt current loops and return discontinuities. An electric-field probe can reveal strong voltage coupling around clock traces, connectors and unterminated structures. Probe results are comparative and highly position-sensitive, so record orientation, height, analyser settings and EUT state.

Once a suspect area is found, apply reversible changes. Add a small series resistor, disconnect a non-required cable, bridge an enclosure seam temporarily or bond a connector shell correctly. A change in the radiated peak indicates that the modified feature participates in the coupling path. Randomly adding ferrites without this diagnosis may suppress one resonance while leaving the dominant mechanism untouched.

Control edge rate at the source

The best clock edge is the slowest edge that still meets timing, jitter and signal-integrity requirements. Excess edge speed provides no functional benefit, but increases high-frequency current and makes every layout imperfection more significant.

A source-series resistor can reduce ringing and limit the initial current launched into a trace. Its value must be selected with the driver output impedance, transmission-line impedance and receiver loading in mind. Placing it at the receiver does not provide the same source-termination behaviour. If the resistor sits several centimetres from the driver, the intervening track remains an unterminated transmission line and can still radiate.

Check the waveform at the receiver as well as at the source. Too much resistance may increase transition time beyond the receiver requirement, move threshold crossings under noise, or worsen deterministic jitter. Too little may leave overshoot and repeated threshold-region energy largely unchanged. Simulation is useful, but an oscilloscope measurement with a low-inductance probing arrangement often exposes package and via effects missing from a simplified model.

Routing and return-current continuity

Clock routing should minimise loop area, not merely track length. At high frequencies, return current follows the path of least impedance, which is normally directly beneath the signal on an adjacent reference plane. A split, slot or void forces that current around the discontinuity. The resulting loop area raises inductance, increases field generation and often couples clock current into unrelated structures.

Avoid changing reference planes. Where a layer transition cannot be avoided, provide an appropriate nearby return path between the reference structures. For ground-to-ground transitions, stitching vias close to the signal via can reduce the return detour. A transition between ground and power references requires more careful treatment because the return path depends on interplane capacitance and deliberately placed decoupling. The correct arrangement is stack-up and frequency dependent.

Keep clock traces away from board edges, connector pin fields, enclosure apertures and cables. Route them as controlled-impedance structures where the edge rate makes transmission-line behaviour relevant. Do not create long test stubs. An unpopulated clock option or exposed test point can form a resonant branch and produce radiation even when it appears electrically harmless at the fundamental.

Differential clocks need equal attention. Differential signalling reduces field cancellation only when the pair remains geometrically balanced and the common-mode component is controlled. Unequal via structures, skew, asymmetric loading and reference discontinuities convert differential energy into common-mode current. That common-mode current is readily coupled onto cables and chassis metal.

Power distribution can export clock harmonics

Every clock transition demands transient current from the power distribution network. If local decoupling and plane impedance are poor, clock harmonics appear on supply rails and may leave the product through power or I/O ports.

Place suitable decoupling close to the device supply and return connections, with short, wide connections and low-inductance vias. Capacitor value alone is not enough. Package inductance, mounting geometry, plane spreading inductance and anti-resonance between capacitor groups can dominate at higher frequencies.

A ferrite bead in a clock-device supply can help in a defined frequency region, but it may also form a high-Q resonance with local capacitance. Assess the bead under realistic DC bias because impedance can change with current. If the rail supplies timing-sensitive circuitry, verify that added impedance does not introduce supply modulation or jitter.

For power-port investigation, a correctly configured line impedance stabilisation network provides a defined RF impedance for relevant conducted emissions measurements. LISNs are measurement networks, not clock-noise filters. The applicable product or product-family standard determines the port, arrangement, limits, detectors and frequency range. Conducted emissions are commonly assessed from 150 kHz to 30 MHz in many applications, but that range must not be assumed universally. EMC Hire can provide information on conducted emissions test systems and suitable LISNs for conducted emissions measurements.

Spread spectrum changes the measurement, not the energy source

Spread-spectrum clocking modulates the clock so that energy is distributed across a frequency band rather than concentrated at narrow spectral lines. This can lower measured peak or quasi-peak amplitudes at individual frequencies. It does not remove switching energy, repair a broken return path or prevent common-mode conversion.

Use spread spectrum only after confirming that every receiving device tolerates the modulation profile. Frequency deviation and modulation rate can affect interface timing, PLL lock, jitter budgets and communications performance. The setting must also represent the production configuration during testing.

Measurement settings matter. Detector type, dwell behaviour, resolution bandwidth and modulation rate influence the displayed result. Peak, quasi-peak and average detectors serve different purposes under applicable CISPR or product-family requirements. An analyser screenshot produced with arbitrary settings is not defensible evidence of margin. For diagnostic work, tuneable receivers and spectrum analysers allow engineers to examine harmonic structure and modulation behaviour, provided the selected instrument covers the required frequency range and measurement function.

Shielding only works when current paths are controlled

A shield should intercept or contain current and provide a low-impedance return path. Conductive tape placed over a plastic enclosure may change a resonance without providing repeatable production shielding. Long drain wires and pigtails add inductance, making them progressively ineffective as frequency rises.

Connector shields normally need a short, low-inductance bond to the chassis or enclosure boundary when the design requires cable screening. Routing shield current through digital ground can inject external common-mode current into the PCB. Enclosure seams, ventilation slots and display apertures also need assessment against the wavelengths and current paths involved.

Shielding the oscillator alone may fail if the clock has already coupled into a cable or power plane. Conversely, improving enclosure bonding can produce a large reduction even when near-field energy remains visible on the PCB. Radiated emissions measurement systems can help confirm whether a modification reduces far-field emissions rather than merely moving local energy.

Typical scenario

Consider an illustrative controller PCB with a fast processor clock, an external display cable and a metal-backed plastic enclosure. Pre-compliance scanning shows narrow peaks aligned with odd clock harmonics. A near-field probe finds energy around the processor, but temporarily removing the display cable causes the dominant radiated peak to fall sharply.

The likely mechanism is common-mode current on the cable, not direct radiation from the oscillator package. The team should inspect the clock return path, connector reference pins, cable shielding arrangement and any clock coupling into display-interface signals. Source termination may reduce ringing, while improved reference continuity and connector bonding may reduce common-mode conversion. Shielding the processor without addressing the cable path would probably give disappointing results.

Early investigation allows these changes while component values, PCB routing and mechanical bonding can still be altered. Waiting for formal testing risks a board respin, enclosure rework and another booked test window.

EMC Hire can support the work with equipment hire, pre-compliance engineering, on-site investigation, access to test facilities and formal compliance testing where appropriate. Test equipment used for the relevant measurement is calibrated with traceability through an appropriate ISO/IEC 17025 accredited calibration provider. Suitable traceability supports repeatability, comparison between development and formal measurements, and a stronger engineering evidence trail.

When to Hire EMC Equipment

Clock-noise investigations often create short periods of intensive measurement rather than a continuous laboratory workload. Hiring can provide a suitable receiver, analyser, near-field probes, antennas, LISNs or associated accessories for a defined debugging window without committing capital to equipment that may not match the next programme.

Ownership also brings storage, servicing, firmware management and calibration overheads. More significantly, an instrument selected for one frequency range, detector requirement or port configuration may be unsuitable for a later product. Rental allows the test capability to scale during project peaks while reducing the risk of buying around an immediate fault.

Equipment selection should follow the test objective. Near-field probes and a spectrum analyser are effective diagnostic tools, but they do not recreate a compliant radiated emissions site. A CISPR-capable receiver may be required where the applicable standard calls for defined detector behaviour. Formal measurements also require controlled geometry, suitable transducers, ambient assessment and documented configurations.

Common EMC Testing Mistakes to Avoid

Chasing every harmonic at the oscillator

The clock source may generate the spectrum while a cable provides the efficient antenna. Local shielding then adds cost without correcting the exported common-mode current.

Changing cable routing between measurements

Cable position strongly affects coupling and radiation. If routing changes after each modification, apparent improvement may be caused by geometry rather than the circuit change. Photograph and dimension the setup.

Using arbitrary analyser settings

An unsuitable resolution bandwidth, detector or sweep configuration can hide intermittent peaks or exaggerate narrowband changes. Use exploratory settings for diagnosis, then repeat relevant measurements using settings required by the applicable method.

Testing an unrepresentative operating mode

An idle processor may gate clocks that run continuously during real operation. Exercise memory, displays, communications and processing loads in a repeatable worst-case or otherwise justified mode.

Ignoring the reference plane

Moving a clock trace away from an I/O connector achieves little if it crosses a plane split. The forced return-current detour can create more radiation than proximity alone.

Keeping incomplete records

Without clock settings, firmware version, cable positions, enclosure state, detector settings and modification details, the result cannot be reproduced. Weak records also undermine the technical file and any later mitigation evidence.

Frequently Asked Questions (FAQs)

Why are odd clock harmonics often stronger?

An ideal symmetrical square wave contains odd harmonics, but real clocks are not ideal. Duty-cycle error, unequal rise and fall times, loading and non-linear coupling can produce even harmonics as well. Do not dismiss a peak merely because it is not an odd multiple.

Should I slow the clock or slow its edges?

If processing requirements allow, lowering clock frequency changes harmonic spacing and switching activity. Edge-rate control directly reduces upper-frequency content and ringing. Timing, jitter and signal-integrity margins must be checked before either change is released.

Can spread spectrum guarantee an emissions pass?

No. It may reduce amplitude at individual measurement frequencies, but the outcome depends on the modulation profile, detector behaviour, coupling mechanism and applicable limits. It should not replace sound routing and return-path design.

When is a LISN relevant to clock noise?

A LISN is relevant when clock-related disturbance reaches a power port being assessed for conducted emissions. It is not used for radiated emissions or conducted RF immunity, and its type must suit the supply and applicable measurement method.

Does pre-compliance testing prove conformity?

No. It provides engineering evidence, supports debugging and improves confidence before a formal programme. The manufacturer or responsible economic operator must confirm the applicable legislation, latest standards editions, product-specific requirements, test levels, configurations, limits and documentation route.

What evidence should be retained?

Keep schematics, PCB revision, firmware, operating modes, photographs, cable layouts, instrument details, calibration status, settings, plots and a clear modification log. Robust records can support the technical file, EMC risk assessment, Declaration of Conformity and self-certification process where applicable, but testing alone does not complete every conformity obligation.

Plan the next measurement

Before ordering another PCB, identify whether the dominant mechanism is direct radiation, return-path discontinuity, power-rail coupling or common-mode current on an external cable. That decision determines whether the useful next tool is a probe, receiver, LISN, antenna system or controlled test facility.

To discuss equipment hire, on-site testing, pre-compliance support, formal compliance testing or a booking at the EMC Hire test facility, contact the engineering team on +44 (0)1462 817111 or email sales@emchire.co.uk. The team can also help define a practical setup and select equipment suited to the required test window.